An innovation for prevention latchup,pseudo-latchup path method,has been put forward that is based on latchup effects of bulk-Si CMOS devices.
从体硅CMOS器件闭锁效应入手,提出了抑制闭锁
一
法—伪闭锁路径法。
An innovation for prevention latchup,pseudo-latchup path method,has been put forward that is based on latchup effects of bulk-Si CMOS devices.
从体硅CMOS器件闭锁效应入手,提出了抑制闭锁
一
法—伪闭锁路径法。
95 Abstract With the rapid development of the IC manufacture, the critical dimension(CD) of the manufacturable CMOS technology has been put into 90nm, even 65nm and below from 130nm.
摘 要 随着IC制造技术快速发展,可量产
CMOS技术,其特征线宽
0.13um
入了90nm甚至65nm及以下。
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